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30 lines
390 B
Makefile
30 lines
390 B
Makefile
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CC = gcc
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CFLAGS = -O3 -std=c99 -Wall -pedantic
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src = $(wildcard *.c)
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src += $(wildcard ../*.c)
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obj = $(src:.c=.o)
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dep = $(obj:.o=.d)
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.PHONY: build all clean
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build: test.exe
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all: clean build
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clean::
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rm -rf $(dep)
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rm -rf $(obj)
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rm -rf *.exe
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test: test.exe
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./test.exe
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test.exe: $(obj)
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gcc $(CFLAGS) -o $@ $^
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-include $(dep)
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%.d: %.c
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$(CC) $(CFLAGS) $< -MM -MT $(@:.d=.o) >$@
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